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Section: Partnerships and Cooperations
European Initiatives
FP7 & H2020 Projects
INTERTWINE
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This project addresses the problem of programming model design and implementation for the Exascale. The first Exascale computers will be very highly parallel systems, consisting of a hierarchy of architectural levels. To program such systems effectively and portably, programming APIs with efficient and robust implementations must be ready in the appropriate timescale. A single, “silver bullet” API which addresses all the architectural levels does not exist and seems very unlikely to emerge soon enough. We must therefore expect that using combinations of different APIs at different system levels will be the only practical solution in the short to medium term. Although there remains room for improvement in individual programming models and their implementations, the main challenges lie in interoperability between APIs. It is this interoperability, both at the specification level and at the implementation level, which this project seeks to address and to further the state of the art. INTERTWinE brings together the principal European organisations driving the evolution of programming models and their implementations. The project will focus on seven key programming APIs: MPI, GASPI, OpenMP, OmpSs, StarPU, QUARK and PaRSEC, each of which has a project partner with extensive experience in API design and implementation. Interoperability requirements, and evaluation of implementations will be driven by a set of kernels and applications, each of which has a project partner with a major role in their development. The project will implement a co- design cycle, by feeding back advances in API design and implementation into the applications and kernels, thereby driving new requirements and hence further advances.
Mont-Blanc 2
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The Mont-Blanc project aims to develop a European Exascale approach leveraging on commodity power-efficient embedded technologies. The project has developed a HPC system software stack on ARM, and will deploy the first integrated ARM-based HPC prototype by 2014, and is also working on a set of 11 scientific applications to be ported and tuned to the prototype system.
Collaborations in European Programs, Except FP7 & H2020
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Abstract: The objectives of PRACE-5IP are to build on and seamlessly continue the successes of PRACE and start new innovative and collaborative activities proposed by the consortium. These include:
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assisting the transition to PRACE2 including analysis of TransNational Access;
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continuing and extend advanced training which so far provided more than 18 800 persontraining days;
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preparing strategies and best practices towards Exascale computing;
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coordinating and enhancing the operation of the multi-tier HPC systems and services;
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supporting users to exploit massively parallel systems and novel architectures.
A high level Service Catalogue is provided. The proven project structure will be used to achieve each of the objectives in 6 dedicated work packages. The activities are designed to increase Europe’s research and innovation potential especially through:
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seamless and efficient Tier-0 services and a pan-European HPC ecosystem including national capabilities;
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promoting take-up by industry and new communities and special offers to SMEs;
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collaborating with the ETP4HPC, CoEs and other European and international organisations on future architectures, training, application support and policies.
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